Improving Quantum Decoding Performance

A few months ago, we shared with you our progress on developing novel decoding algorithms for qLDPC codes. That effort resulted in the Relay-BP algorithm (https://lnkd.in/eFbWNFeU), which surpassed prior state-of-the-art qLDPC decoders in terms of logical error rate while simultaneously removing barriers toward real-time implementation. In particular, we showed that a novel variation of the belief propagation (BP) algorithm was sufficient for accurate decoding of our gross code without the need of an expensive second-stage decoder to fix cases where BP failed to converge. I’m excited to tell you about some of the progress we’ve made on taking the first steps towards implementing a real-time decoder in hardware (https://lnkd.in/e8CShTmT). Our initial effort has focused on FPGAs because they are very flexible and allow for very low-latency integration into our quantum control system. FPGAs’ flexibility in supporting custom logic and user-defined numerical formats allowed us to evaluate the performance of Relay-BP across a range of floating-point, fixed-point, and integer precisions. Encouragingly, we observe a high tolerance to reduced precision. Our experiments show that even 6-bit arithmetic is sufficient to maintain decoding performance. We explored the speed limits of an FPGA Relay-BP implementation in a maximally-parallel computational architecture. Like traditional BP, the Relay-BP algorithm is a message-passing algorithm where messages are exchanged between nodes on a decoding graph. Our maximally parallel implementation assigns a unique compute resource to every node in this graph, allowing a full BP iteration to be computed on every clock cycle. This decoder architecture is resource-intensive, but we succeeded in building a Relay-BP decoder for the gross code and fit it within a single AMD VU19P FPGA. Our implementation is limited to split X/Z decoding of the gross code syndrome cycle (we decode windows of 12 cycles), a simpler implementation than we’d need for Starling. That being said, it is extremely fast, an absolute requirement for practical implementation. In fact, we can execute a Relay-BP iteration in 24ns. As physical error rates drop below 1e-3, Relay-BP typically converges in less than 20 iterations. This means we can complete the decoding task in about 480ns. This is significantly faster than what is possible with NVIDIA’s DGX-Quantum solution, which requires a 4000ns start-up cost before decoding begins. The figure below compares the logical error performance versus physical error rate of our FPGA implementation compared to a floating-point software implementation for memory experiments of the size of Loon and Kookaburra on our Innovation roadmap. This and further data shows that the reduced precision arithmetic in the FPGA matches the accuracy of a software model, while simultaneously running dramatically faster. Further details are in the pre-print: https://lnkd.in/e8CShTmT

I think we're still just scratching the surface of the transformative impact AI is going to have on quantum computing, and many assumptions and architectural choices that have seemed solid for years aren't taking that potential into account. For most of the last decade, color codes fell out of favor for performance reasons. But color codes have important structural advantages: they do all Clifford gates transversally, their symmetry makes lattice surgery simpler, and they can prepare magic states directly in a fault-tolerant way. This week we released an AI pre-decoder for color codes as part of our NVIDIA Ising open model family that changes that calculation and we think will reinvigorate these codes. It is a small 3D CNN called Ising ColorCode 1. We integrated it with Chromobius, the state-of-the-art color code decoder, and were able to achieve 7.3x overall acceleration while improving logical error rate by a whopping 347x at distance 31. The advantage grows with code distance, with a crossover near distance 13 where this approach starts to show an advantage in both accuracy and end-to-end runtime at once. We've shipped this open source as part of our Ising family. Weights, benchmarks, and a full training pipeline that generates synthetic data on the fly with cuQuantum and cuStabilizer, so any team can train a decoder tuned to their own QPU's noise. We're excited to see the community build on this and continue to improve it. Congratulations to the researchers - Dr. Christopher Chamberland, Jan Olle, Muyuan Li, and Igor Baratta, and the entire NVIDIA team behind Ising. Paper: https://lnkd.in/gXv9HzAi Blog: https://lnkd.in/gqbn4qeT Code: https://lnkd.in/gGR5RiJR

New work from a Harvard team highlights a major bottleneck in fault-tolerant quantum computing: the classical decoder used in quantum error correction. Quick primer on QEC: 1. Encode: A logical qubit is spread across many physical qubits, so no single error destroys the information. 2. Detect: Stabilizer measurements run repeatedly. They do not reveal the quantum state, but they do flag when something has gone wrong. The pattern of those flags is called the syndrome. 3. Decode: A classical computer reads the syndrome and infers which error most likely occurred. 4. Correct: The correction is applied, and the logical qubit survives. Step 3 is where things get hard. For quantum LDPC codes, one of the most promising routes to efficient fault tolerance, practical decoders have usually forced a tradeoff between speed and accuracy: the fast ones are too weak, and the accurate ones are too slow for real-time use. This paper introduces Cascade, a geometry-aware convolutional neural decoder. The key idea is not just “use a neural network,” but to build the structure of the code directly into the model: locality, translation equivariance, and anisotropy. That makes this feel less like generic ML and more like architecture co-design. Some of the headline results: - On the [[144, 12, 12]] Gross code, Cascade achieves logical error rates up to 17x lower than prior practical decoders, with 3–5 orders of magnitude higher throughput - It reveals a “waterfall” regime in which logical errors fall much faster than standard distance-based formulas would suggest, largely because earlier decoders were not strong enough to expose it - In one surface code example, that translates to roughly 40% fewer physical qubits to reach a target logical error rate of 10^-9 - Its confidence estimates are well calibrated, which enables post-selection. In one setting on the [[72, 12, 6]] code, that implies roughly 20x fewer retries for repeat-until-success protocols such as magic state distillation - Current GPU latencies already fit the timing budgets for trapped-ion and neutral-atom platforms. Superconducting qubits still require a tighter ~1 microsecond budget, with FPGA and ASIC paths supported by the hardware estimates in the supplement The broader takeaway: decoder quality is not just an implementation detail. It directly shapes how many qubits and how much time fault-tolerant quantum computing actually requires, and those costs may be meaningfully lower than standard estimates assume. Paper: https://lnkd.in/g9D82Ry8

Quantum error correction is facing a critical dilemma: do we choose the low-overhead efficiency of Quantum LDPC codes or the robust fault tolerance of surface codes? A groundbreaking new paper from the IBM Quantum team solves this trade-off by introducing a powerful new architecture: Concatenating Algebraic Codes over High-Rate Quantum LDPC Codes. The core challenge with high-rate qLDPC codes is that a single error block can cause correlated faults across multiple logical qubits. This paper introduces a brilliant workaround. Instead of treating logical qubits individually, they bundle them into a large logical Galois qudit. Then, they wrap this structure in a Quantum Reed-Solomon outer code using advanced list decoding techniques. The results are a game-changer for fault-tolerant quantum computing. Under a 10^-3 physical noise floor, this concatenated approach successfully pushes performance into the ultra-reliable teraquop regime, all while maintaining a remarkably low physical qubit overhead. It bridges the gap between theoretical efficiency and practical scalability. What are your thoughts on using concatenated algebraic codes to scale fault-tolerant hardware? Let's discuss in the comments. #QuantumComputing #QuantumErrorCorrection #QEC #QuantumLDPC #IBMQuantum #Physics #DeepTech